diff --git a/pcb/Lily58-footprint.pretty/1pin_conn.kicad_mod b/pcb/Lily58-footprint.pretty/1pin_conn.kicad_mod
new file mode 100644
index 0000000..27bf1f2
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/1pin_conn.kicad_mod
@@ -0,0 +1,33 @@
+(module 1pin_conn (layer F.Cu) (tedit 5AD20A86)
+  (descr "Resitance 3 pas")
+  (tags R)
+  (autoplace_cost180 10)
+  (fp_text reference P1 (at 1.9 0.1) (layer F.SilkS)
+    (effects (font (size 0.8128 0.8128) (thickness 0.15)))
+  )
+  (fp_text value i2c-pin (at 0 -1.4605) (layer F.SilkS) hide
+    (effects (font (size 0.5 0.5) (thickness 0.125)))
+  )
+  (fp_text user P1 (at 1.8 0.1) (layer B.SilkS)
+    (effects (font (size 0.8128 0.8128) (thickness 0.15)) (justify mirror))
+  )
+  (fp_line (start -1 -1) (end 1 -1) (layer B.SilkS) (width 0.15))
+  (fp_line (start 1 -1) (end 1 1) (layer B.SilkS) (width 0.15))
+  (fp_line (start 1 1) (end -1 1) (layer B.SilkS) (width 0.15))
+  (fp_line (start -1 1) (end -1 -1) (layer B.SilkS) (width 0.15))
+  (fp_line (start -1 -1) (end -1 1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1 1) (end 1 -1) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1 -1) (end -1 -1) (layer F.SilkS) (width 0.15))
+  (pad 1 thru_hole circle (at 0 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (model discret/resistor.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3 0.3 0.3))
+    (rotate (xyz 0 0 0))
+  )
+  (model Resistors_ThroughHole.3dshapes/Resistor_Horizontal_RM10mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.2 0.2 0.2))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/pcb/Lily58-footprint.pretty/Diode_TH_SOD123.kicad_mod b/pcb/Lily58-footprint.pretty/Diode_TH_SOD123.kicad_mod
index 3dfe81a..3470f36 100644
--- a/pcb/Lily58-footprint.pretty/Diode_TH_SOD123.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/Diode_TH_SOD123.kicad_mod
@@ -1,7 +1,7 @@
-(module minisplit2-footprint:Diode_TH_SOD123 placed (layer F.Cu) (tedit 5A9A5730)
+(module Diode_TH_SOD123 placed (layer F.Cu) (tedit 5B8F6759)
   (descr "Diode, DO-41, SOD81, Horizontal, RM 10mm,")
   (tags "Diode, DO-41, SOD81, Horizontal, RM 10mm, 1N4007, SB140,")
-  (fp_text reference D3 (at 0 1.4) (layer F.SilkS)
+  (fp_text reference D26 (at 0 1.5) (layer F.SilkS)
     (effects (font (size 1 1) (thickness 0.15)))
   )
   (fp_text value D (at 0 -1.2) (layer F.Fab) hide
diff --git a/pcb/Lily58-footprint.pretty/JPC2.kicad_mod b/pcb/Lily58-footprint.pretty/JPC2.kicad_mod
new file mode 100644
index 0000000..cffb8e1
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/JPC2.kicad_mod
@@ -0,0 +1,24 @@
+(module JPC2 (layer F.Cu) (tedit 5AD20B15)
+  (attr smd)
+  (fp_text reference data (at -0.1 2.3 270) (layer F.SilkS)
+    (effects (font (size 0.8128 0.8128) (thickness 0.1524)))
+  )
+  (fp_text value " " (at 0 1.524) (layer F.SilkS) hide
+    (effects (font (size 0.8128 0.8128) (thickness 0.15)))
+  )
+  (fp_line (start -1.143 -0.889) (end 1.143 -0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.143 -0.889) (end 1.143 0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.143 0.889) (end -1.143 0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.143 0.889) (end -1.143 -0.889) (layer F.SilkS) (width 0.15))
+  (pad 1 smd rect (at -0.50038 0) (size 0.635 1.143) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.1905))
+  (pad 2 smd rect (at 0.50038 0) (size 0.635 1.143) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.1905))
+  (pad "" smd rect (at 0 0 90) (size 0.381 0.381) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.00254))
+  (model smd\resistors\R0603.wrl
+    (offset (xyz 0 0 0.02539999961853028))
+    (scale (xyz 0.5 0.5 0.5))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/pcb/Lily58-footprint.pretty/LED.kicad_mod b/pcb/Lily58-footprint.pretty/LED.kicad_mod
new file mode 100644
index 0000000..feaaa08
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/LED.kicad_mod
@@ -0,0 +1,53 @@
+(module Lily58-footprint:LED (layer F.Cu) (tedit 5B8267F7)
+  (fp_text reference J1 (at 0 -2.54) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value LED (at 0 7.62) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user VCC (at -2.2 5.2) (layer B.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
+  )
+  (fp_text user VCC (at -2.2 5.2) (layer F.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)))
+  )
+  (fp_line (start -0.9 6) (end -0.9 4.2) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 6) (end -0.9 6) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 4.2) (end 0.9 6) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 4.2) (end 0.9 4.2) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 0.9) (end -0.9 -0.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 0.9) (end -0.9 0.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 -0.9) (end 0.9 0.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 -0.9) (end 0.9 -0.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 3.4) (end -0.9 1.6) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 3.4) (end -0.9 3.4) (layer B.SilkS) (width 0.15))
+  (fp_line (start 0.9 1.6) (end 0.9 3.4) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 1.6) (end 0.9 1.6) (layer B.SilkS) (width 0.15))
+  (fp_line (start -0.9 4.2) (end 0.9 4.2) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.9 -0.9) (end 0.9 -0.9) (layer F.SilkS) (width 0.15))
+  (fp_text user GND (at -2.2 0) (layer F.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)))
+  )
+  (fp_text user LED (at -2.2 2.5) (layer B.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
+  )
+  (fp_text user LED (at -2.2 2.5 180) (layer F.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)))
+  )
+  (fp_text user GND (at -2.2 0) (layer B.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
+  )
+  (fp_line (start 0.9 -0.9) (end 0.9 0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.9 0.9) (end -0.9 0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.9 0.9) (end -0.9 -0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.9 1.6) (end 0.9 1.6) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.9 3.4) (end -0.9 3.4) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.9 1.6) (end 0.9 3.4) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.9 1.6) (end -0.9 3.4) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.9 4.2) (end 0.9 6) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.9 6) (end -0.9 6) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.9 4.2) (end -0.9 6) (layer F.SilkS) (width 0.15))
+  (pad 3 thru_hole rect (at 0 5.1) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask))
+  (pad 2 thru_hole rect (at 0 2.5) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask))
+  (pad 1 thru_hole rect (at 0 0 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask))
+)
diff --git a/pcb/Lily58-footprint.pretty/MJ-4PP-9.kicad_mod b/pcb/Lily58-footprint.pretty/MJ-4PP-9.kicad_mod
new file mode 100644
index 0000000..483678d
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/MJ-4PP-9.kicad_mod
@@ -0,0 +1,49 @@
+(module MJ-4PP-9 (layer F.Cu) (tedit 5B8F65F5)
+  (fp_text reference J2 (at -0.1 15.1) (layer F.SilkS) hide
+    (effects (font (size 0.8 0.8) (thickness 0.15)))
+  )
+  (fp_text value 4PIN (at 0 14) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 0.75 0) (end 0.75 -1.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start 1.25 0) (end 0.75 0) (layer B.SilkS) (width 0.15))
+  (fp_line (start -4.2 -1.9) (end 0.75 -1.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start -4.25 0) (end -4.25 -1.9) (layer B.SilkS) (width 0.15))
+  (fp_line (start -2.5 -1.9) (end 2.5 -1.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 0) (end 2.5 0) (layer F.SilkS) (width 0.15))
+  (fp_line (start -2.5 0) (end -2.5 -1.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start 2.5 0) (end 2.5 -1.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start -4.75 12) (end -4.75 0) (layer B.SilkS) (width 0.15))
+  (fp_line (start 1.25 12) (end -4.75 12) (layer B.SilkS) (width 0.15))
+  (fp_line (start 1.25 0) (end 1.25 12) (layer B.SilkS) (width 0.15))
+  (fp_line (start -4.75 0) (end -4.25 0) (layer B.SilkS) (width 0.15))
+  (fp_line (start -3 0) (end -2.5 0) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 0) (end 3 12) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 12) (end -3 12) (layer F.SilkS) (width 0.15))
+  (fp_line (start -3 12) (end -3 0) (layer F.SilkS) (width 0.15))
+  (pad "" np_thru_hole circle (at -1.75 8.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
+  (pad "" np_thru_hole circle (at -1.75 1.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
+  (pad 1 thru_hole rect (at -3.85 10.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 4 thru_hole rect (at 0.35 11.8) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 3 thru_hole rect (at -3.85 3.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 2 thru_hole rect (at -3.85 6.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad "" np_thru_hole circle (at 0 1.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
+  (pad "" np_thru_hole circle (at 0 8.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
+  (pad 3 thru_hole rect (at 2.1 3.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 2 thru_hole rect (at 2.1 6.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 1 thru_hole rect (at 2.1 10.3) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad 4 thru_hole rect (at -2.1 11.8) (size 1 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (model "../../../../../../Users/pluis/Documents/Magic Briefcase/Documents/KiCad/3d/AB2_TRS_3p5MM_PTH.wrl"
+    (at (xyz 0 0 0))
+    (scale (xyz 0.42 0.42 0.42))
+    (rotate (xyz 0 0 90))
+  )
+)
diff --git a/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_18mm.kicad_mod b/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_18mm.kicad_mod
index 8cdf567..c8f7422 100644
--- a/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_18mm.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_18mm.kicad_mod
@@ -1,11 +1,11 @@
-(module seiso56-footprint:MX_PG1350-Under_FLIP_HOLES_18mm (layer F.Cu) (tedit 5AF7E257)
+(module Lily58-footprint:MX_PG1350-Under_FLIP_HOLES_18mm (layer F.Cu) (tedit 5B8283C3)
   (descr MXALPS)
   (tags MXALPS)
-  (fp_text reference SW17 (at 0 3.048) (layer B.SilkS) hide
-    (effects (font (thickness 0.3048)) (justify mirror))
+  (fp_text reference SW13 (at 0 3.048) (layer B.SilkS) hide
+    (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
   )
   (fp_text value SW_PUSH (at 0 9) (layer B.SilkS) hide
-    (effects (font (thickness 0.3048)) (justify mirror))
+    (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
   )
   (fp_line (start -7 7) (end -7 -7) (layer Dwgs.User) (width 0.1))
   (fp_line (start 7 7) (end -7 7) (layer Dwgs.User) (width 0.1))
@@ -19,7 +19,7 @@
     (clearance 0.1524))
   (pad "" np_thru_hole circle (at -5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask)
     (clearance 0.1524))
-  (pad "" np_thru_hole circle (at -5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask))
+  (pad "" np_thru_hole circle (at -5.22 -4.2) (size 1 1) (drill 1) (layers *.Cu *.Mask))
   (pad 1 thru_hole circle (at -3.81 -2.54) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
   (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)
     (clearance 0.1524))
@@ -33,5 +33,5 @@
   (pad 2 thru_hole circle (at -5 3.8) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
   (pad 1 thru_hole circle (at 0 5.9) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
   (pad 2 thru_hole circle (at 5 3.8) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
-  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask))
+  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1 1) (drill 1) (layers *.Cu *.Mask))
 )
diff --git a/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_27mm.kicad_mod b/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_27mm.kicad_mod
index d782750..e8dd5c7 100644
--- a/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_27mm.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/MX_PG1350-Under_FLIP_HOLES_27mm.kicad_mod
@@ -1,37 +1,37 @@
-(module seiso56-footprint:MX_PG1350-Under_FLIP_HOLES_18mm (layer F.Cu) (tedit 5B5C70C9)
+(module Lily58-footprint:MX_PG1350-Under_FLIP_HOLES_27mm (layer F.Cu) (tedit 5B82840D)
   (descr MXALPS)
   (tags MXALPS)
-  (fp_text reference SW12 (at 0 3.048) (layer B.SilkS) hide
+  (fp_text reference SW26 (at 0 3.048) (layer B.SilkS) hide
     (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
   )
   (fp_text value SW_PUSH (at 0 9) (layer B.SilkS) hide
     (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
   )
-  (fp_line (start -13.5 9) (end -13.5 -9) (layer Dwgs.User) (width 0.3))
-  (fp_line (start 13.5 9) (end -13.5 9) (layer Dwgs.User) (width 0.3))
-  (fp_line (start 13.5 -9) (end 13.5 9) (layer Dwgs.User) (width 0.3))
-  (fp_line (start -13.5 -9) (end 13.5 -9) (layer Dwgs.User) (width 0.3))
-  (fp_line (start -7 -7) (end 7 -7) (layer Dwgs.User) (width 0.1))
-  (fp_line (start 7 -7) (end 7 7) (layer Dwgs.User) (width 0.1))
-  (fp_line (start 7 7) (end -7 7) (layer Dwgs.User) (width 0.1))
   (fp_line (start -7 7) (end -7 -7) (layer Dwgs.User) (width 0.1))
-  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask))
-  (pad 2 thru_hole circle (at 5 3.8) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 1 thru_hole circle (at 0 5.9) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 2 thru_hole circle (at -5 3.8) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 2 thru_hole circle (at 2.54 -5.08) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 1 thru_hole circle (at -2.54 -5.08) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 2 thru_hole circle (at 3.81 -2.54) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
-  (pad "" np_thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)
+  (fp_line (start 7 7) (end -7 7) (layer Dwgs.User) (width 0.1))
+  (fp_line (start 7 -7) (end 7 7) (layer Dwgs.User) (width 0.1))
+  (fp_line (start -7 -7) (end 7 -7) (layer Dwgs.User) (width 0.1))
+  (fp_line (start -13.5 -9) (end 13.5 -9) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 13.5 -9) (end 13.5 9) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 13.5 9) (end -13.5 9) (layer Dwgs.User) (width 0.3))
+  (fp_line (start -13.5 9) (end -13.5 -9) (layer Dwgs.User) (width 0.3))
+  (pad "" np_thru_hole circle (at 5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask)
+    (clearance 0.1524))
+  (pad "" np_thru_hole circle (at -5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask)
+    (clearance 0.1524))
+  (pad "" np_thru_hole circle (at -5.22 -4.2) (size 1 1) (drill 1) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at -3.81 -2.540001) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
+  (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)
     (clearance 0.1524))
   (pad "" np_thru_hole circle (at -5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)
     (clearance 0.1524))
-  (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)
-    (clearance 0.1524))
-  (pad 1 thru_hole circle (at -3.81 -2.54) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
-  (pad "" np_thru_hole circle (at -5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask))
-  (pad "" np_thru_hole circle (at -5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask)
-    (clearance 0.1524))
-  (pad "" np_thru_hole circle (at 5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask)
+  (pad "" np_thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)
     (clearance 0.1524))
+  (pad 2 thru_hole circle (at 3.81 -2.54) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at -2.54 -5.08) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.54 -5.08) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at -5 3.8) (size 2.8 2.8) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at 0 5.9) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 5 3.8) (size 2.6 2.6) (drill 1.5) (layers *.Cu *.Mask))
+  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1 1) (drill 1) (layers *.Cu *.Mask))
 )
diff --git a/pcb/Lily58-footprint.pretty/ProMicro_rev2.kicad_mod b/pcb/Lily58-footprint.pretty/ProMicro_rev2.kicad_mod
new file mode 100644
index 0000000..000e1bc
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/ProMicro_rev2.kicad_mod
@@ -0,0 +1,78 @@
+(module ProMicro_rev2 (layer F.Cu) (tedit 5B8BDEB4)
+  (fp_text reference U1 (at 0 1.2) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value ProMicro (at 0 -0.8) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -10.09 14.44) (end -10.09 -16.04) (layer B.SilkS) (width 0.15))
+  (fp_line (start -7.55 14.44) (end -10.09 14.44) (layer B.SilkS) (width 0.15))
+  (fp_line (start -7.55 -16.04) (end -7.55 14.44) (layer B.SilkS) (width 0.15))
+  (fp_line (start -10.09 -16.04) (end -7.55 -16.04) (layer B.SilkS) (width 0.15))
+  (fp_line (start 5.15 14.44) (end 5.15 -16.04) (layer B.SilkS) (width 0.15))
+  (fp_line (start 7.69 14.44) (end 5.15 14.44) (layer B.SilkS) (width 0.15))
+  (fp_line (start 7.69 -16.04) (end 7.69 14.44) (layer B.SilkS) (width 0.15))
+  (fp_line (start 5.15 -16.04) (end 7.69 -16.04) (layer B.SilkS) (width 0.15))
+  (fp_line (start -10.09 14.44) (end -10.09 -18.58) (layer B.SilkS) (width 0.15))
+  (fp_line (start 7.69 -18.58) (end 7.69 14.44) (layer B.SilkS) (width 0.15))
+  (fp_line (start -10.09 -18.58) (end 7.69 -18.58) (layer B.SilkS) (width 0.15))
+  (fp_line (start 6.448815 15.635745) (end 8.988815 15.635745) (layer F.SilkS) (width 0.15))
+  (fp_line (start -6.251185 -14.844255) (end -8.791185 -14.844255) (layer F.SilkS) (width 0.15))
+  (fp_line (start -8.791185 -14.844255) (end -8.791185 15.635745) (layer F.SilkS) (width 0.15))
+  (fp_line (start -8.791185 -17.384255) (end -8.791185 15.635745) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.988815 -17.384255) (end -8.791185 -17.384255) (layer F.SilkS) (width 0.15))
+  (fp_line (start -8.791185 15.635745) (end -6.251185 15.635745) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.988815 -14.844255) (end 6.448815 -14.844255) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.988815 15.635745) (end 8.988815 -17.384255) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.448815 -14.844255) (end 6.448815 15.635745) (layer F.SilkS) (width 0.15))
+  (fp_line (start -6.251185 15.635745) (end -6.251185 -14.844255) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.988815 15.635745) (end 8.988815 -14.844255) (layer F.SilkS) (width 0.15))
+  (pad 24 thru_hole circle (at 6.42 -14.77) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 23 thru_hole circle (at 6.42 -12.23) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 22 thru_hole circle (at 6.42 -9.69) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 21 thru_hole circle (at 6.42 -7.15) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 20 thru_hole circle (at 6.42 -4.61) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 19 thru_hole circle (at 6.42 -2.07) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 18 thru_hole circle (at 6.42 0.47) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 17 thru_hole circle (at 6.42 3.01) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 16 thru_hole circle (at 6.42 5.55) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 15 thru_hole circle (at 6.42 8.09) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 14 thru_hole circle (at 6.42 10.63) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 13 thru_hole circle (at 6.42 13.17) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 12 thru_hole circle (at -8.82 13.17) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 11 thru_hole circle (at -8.82 10.63) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 10 thru_hole circle (at -8.82 8.09) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 9 thru_hole circle (at -8.82 5.55) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 8 thru_hole circle (at -8.82 3.01) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 7 thru_hole circle (at -8.82 0.47) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 6 thru_hole circle (at -8.82 -2.07) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 5 thru_hole circle (at -8.82 -4.61) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 4 thru_hole circle (at -8.82 -7.15) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 3 thru_hole circle (at -8.82 -9.69) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 2 thru_hole circle (at -8.82 -12.23) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 1 thru_hole circle (at -8.82 -14.77) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+  (pad 5 thru_hole circle (at 7.718815 -3.414255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 7 thru_hole circle (at 7.718815 1.665745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 24 thru_hole circle (at -7.521185 -13.574255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 2 thru_hole circle (at 7.718815 -11.034255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 11 thru_hole circle (at 7.718815 11.825745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 13 thru_hole circle (at -7.521185 14.365745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 8 thru_hole circle (at 7.718815 4.205745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 9 thru_hole circle (at 7.718815 6.745745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 17 thru_hole circle (at -7.521185 4.205745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 15 thru_hole circle (at -7.521185 9.285745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 20 thru_hole circle (at -7.521185 -3.414255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 21 thru_hole circle (at -7.521185 -5.954255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 23 thru_hole circle (at -7.521185 -11.034255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 19 thru_hole circle (at -7.521185 -0.874255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 12 thru_hole circle (at 7.718815 14.365745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 16 thru_hole circle (at -7.521185 6.745745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 1 thru_hole circle (at 7.718815 -13.574255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 3 thru_hole circle (at 7.718815 -8.494255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 14 thru_hole circle (at -7.521185 11.825745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 4 thru_hole circle (at 7.718815 -5.954255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 6 thru_hole circle (at 7.718815 -0.874255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 18 thru_hole circle (at -7.521185 1.665745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 10 thru_hole circle (at 7.718815 9.285745 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+  (pad 22 thru_hole circle (at -7.521185 -8.494255 180) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask B.SilkS))
+)
diff --git a/pcb/Lily58-footprint.pretty/RESISTOR_mini.kicad_mod b/pcb/Lily58-footprint.pretty/RESISTOR_mini.kicad_mod
index 5b2fbc8..65f0cb0 100644
--- a/pcb/Lily58-footprint.pretty/RESISTOR_mini.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/RESISTOR_mini.kicad_mod
@@ -1,9 +1,9 @@
-(module MYLIB:R2 (layer F.Cu) (tedit 59FD1DC8)
+(module RESISTOR_mini (layer F.Cu) (tedit 5B8CD4DE)
   (descr "Resitance 3 pas")
   (tags R)
   (autoplace_cost180 10)
-  (fp_text reference R1 (at 0.05 -0.08) (layer F.SilkS)
-    (effects (font (size 0.8128 0.8128) (thickness 0.15)))
+  (fp_text reference R1 (at 0 0) (layer F.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)))
   )
   (fp_text value R (at 0 -1.6) (layer F.SilkS) hide
     (effects (font (size 0.5 0.5) (thickness 0.125)))
@@ -16,6 +16,9 @@
   (fp_line (start -1.50114 1.00076) (end 1.50114 1.00076) (layer F.SilkS) (width 0.15))
   (fp_line (start 1.50114 1.00076) (end 1.50114 -1.00076) (layer F.SilkS) (width 0.15))
   (fp_line (start 1.50114 -1.00076) (end -1.50114 -1.00076) (layer F.SilkS) (width 0.15))
+  (fp_text user R1 (at 0 0) (layer B.SilkS)
+    (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
+  )
   (pad 1 thru_hole circle (at -2.54 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
   (pad 2 thru_hole circle (at 2.54 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
   (model discret/resistor.wrl
diff --git a/pcb/Lily58-footprint.pretty/StripLED.kicad_mod b/pcb/Lily58-footprint.pretty/StripLED.kicad_mod
index 87e8268..9bbc065 100644
--- a/pcb/Lily58-footprint.pretty/StripLED.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/StripLED.kicad_mod
@@ -1,28 +1,10 @@
-(module kbd:StripLED_rev (layer F.Cu) (tedit 5AFFA09A)
+(module StripLED (layer F.Cu) (tedit 5A0FFE9D)
   (fp_text reference J3 (at 0 -2.54) (layer F.SilkS) hide
     (effects (font (size 1 1) (thickness 0.15)))
   )
   (fp_text value LED (at 0 7.62) (layer F.Fab) hide
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text user GND (at -2.54 5.08) (layer F.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)))
-  )
-  (fp_text user VCC (at -2.54 5.08) (layer B.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
-  )
-  (fp_text user LED (at -2.54 2.54) (layer B.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
-  )
-  (fp_text user LED (at -2.54 2.54) (layer F.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)))
-  )
-  (fp_text user VCC (at -2.54 0) (layer F.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)))
-  )
-  (fp_text user GND (at -2.54 0) (layer B.SilkS)
-    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
-  )
   (pad 3 smd rect (at 0 5.08) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask))
   (pad 2 smd rect (at 0 2.54) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask))
   (pad 1 smd rect (at 0 0) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask))
diff --git a/pcb/Lily58-footprint.pretty/TACT_SWITCH_TVBP06.kicad_mod b/pcb/Lily58-footprint.pretty/TACT_SWITCH_TVBP06.kicad_mod
index 7d1db64..d726bd7 100644
--- a/pcb/Lily58-footprint.pretty/TACT_SWITCH_TVBP06.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/TACT_SWITCH_TVBP06.kicad_mod
@@ -1,25 +1,29 @@
-(module seiso56-footprint:TACT_SWITCH_TVBP06 (layer F.Cu) (tedit 5AFFDD41)
+(module TACT_SWITCH_TVBP06 (layer F.Cu) (tedit 5B8CD44F)
   (fp_text reference RSW1 (at 0 -1.7) (layer F.SilkS) hide
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value SW_PUSH (at 0 2) (layer F.Fab) hide
+  (fp_text value SW_RST (at 0 2) (layer F.Fab) hide
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text user RESET (at 0 -1.7 180) (layer F.SilkS)
+  (fp_text user RESET (at 0 0 -180) (layer F.SilkS)
     (effects (font (size 0.8 0.8) (thickness 0.15)))
   )
-  (fp_text user RESET (at 0 -1.7) (layer B.SilkS)
+  (fp_text user RESET (at 0 0) (layer B.SilkS)
     (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
   )
-  (fp_line (start -3 -3.5) (end 2.9 -3.5) (layer B.SilkS) (width 0.15))
-  (fp_line (start -3 -3.5) (end 3 -3.5) (layer B.SilkS) (width 0.15))
-  (fp_line (start 3 -3.5) (end 3 0) (layer B.SilkS) (width 0.15))
-  (fp_line (start 3 0) (end -3 0) (layer B.SilkS) (width 0.15))
-  (fp_line (start -3 0) (end -3 -3.5) (layer B.SilkS) (width 0.15))
-  (fp_line (start -3 -3.5) (end -3 0) (layer F.SilkS) (width 0.15))
-  (fp_line (start 3 -3.5) (end -3 -3.5) (layer F.SilkS) (width 0.15))
-  (fp_line (start 3 0) (end 3 -3.5) (layer F.SilkS) (width 0.15))
-  (fp_line (start -3 0) (end 3 0) (layer F.SilkS) (width 0.15))
-  (pad 1 thru_hole oval (at -3.6 -1.75) (size 2.3 3) (drill oval 1.3 2) (layers *.Cu *.Mask))
-  (pad 2 thru_hole oval (at 3.6 -1.75) (size 2.3 3) (drill oval 1.3 2) (layers *.Cu *.Mask))
+  (fp_line (start -3 -1.8) (end 2.9 -1.8) (layer B.SilkS) (width 0.15))
+  (fp_line (start -3 -1.8) (end 3 -1.8) (layer B.SilkS) (width 0.15))
+  (fp_line (start 3 1.7) (end -3 1.7) (layer B.SilkS) (width 0.15))
+  (fp_line (start 3 -1.8) (end -3 -1.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -3 1.7) (end 3 1.7) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 -1.8) (end 3 -1.1) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 1.7) (end 3 1.1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -3 1.7) (end -3 1.1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -3 -1.8) (end -3 -1.1) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3 -1.8) (end 3 -1.1) (layer B.SilkS) (width 0.15))
+  (fp_line (start 3 1.7) (end 3 1.1) (layer B.SilkS) (width 0.15))
+  (fp_line (start -3 1.7) (end -3 1.1) (layer B.SilkS) (width 0.15))
+  (fp_line (start -3 -1.8) (end -3 -1.1) (layer B.SilkS) (width 0.15))
+  (pad 1 thru_hole circle (at -3.25 0) (size 2 2) (drill 1.3) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 3.25 0) (size 2 2) (drill 1.3) (layers *.Cu *.Mask))
 )
diff --git a/pcb/Lily58-footprint.pretty/TRRS_JACK_MJ4PP9.kicad_mod b/pcb/Lily58-footprint.pretty/TRRS_JACK_MJ4PP9.kicad_mod
index 6d3bf92..4256817 100644
--- a/pcb/Lily58-footprint.pretty/TRRS_JACK_MJ4PP9.kicad_mod
+++ b/pcb/Lily58-footprint.pretty/TRRS_JACK_MJ4PP9.kicad_mod
@@ -1,5 +1,5 @@
-(module seiso56-footprint:TRRS_JACK_MJ4PP9 (layer F.Cu) (tedit 5B1F86F8)
-  (fp_text reference J1 (at -0.1 15.1) (layer F.SilkS) hide
+(module TRRS_JACK_MJ4PP9 (layer F.Cu) (tedit 5B8BE37A)
+  (fp_text reference J2 (at -0.1 15.1) (layer F.SilkS) hide
     (effects (font (size 0.8 0.8) (thickness 0.15)))
   )
   (fp_text value 5PIN (at 0 14) (layer F.Fab) hide
@@ -23,19 +23,23 @@
   (fp_line (start -3 12) (end -3 0) (layer F.SilkS) (width 0.15))
   (pad "" np_thru_hole circle (at -1.75 8.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
   (pad "" np_thru_hole circle (at -1.75 1.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
-  (pad 1 thru_hole oval (at -3.85 10.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS)
+  (pad D thru_hole rect (at -3.85 10.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
     (clearance 0.15))
-  (pad 4 thru_hole oval (at 0.35 11.8) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS)
+  (pad A thru_hole rect (at 0.35 11.8) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad B thru_hole rect (at -3.85 3.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad C thru_hole rect (at -3.85 6.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
     (clearance 0.15))
-  (pad 2 thru_hole oval (at -3.85 3.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS))
-  (pad 3 thru_hole oval (at -3.85 6.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS))
   (pad "" np_thru_hole circle (at 0 1.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
   (pad "" np_thru_hole circle (at 0 8.5) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
-  (pad 2 thru_hole oval (at 2.1 3.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS))
-  (pad 3 thru_hole oval (at 2.1 6.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS))
-  (pad 1 thru_hole oval (at 2.1 10.3) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS)
+  (pad B thru_hole rect (at 2.1 3.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
     (clearance 0.15))
-  (pad 4 thru_hole oval (at -2.1 11.8) (size 1.7 2.5) (drill oval 1 1.5) (layers *.Cu *.Mask F.SilkS)
+  (pad C thru_hole rect (at 2.1 6.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad D thru_hole rect (at 2.1 10.3) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
+    (clearance 0.15))
+  (pad A thru_hole rect (at -2.1 11.8) (size 0.8 2.1) (drill oval 0.3 1.6) (layers *.Cu *.Mask F.SilkS)
     (clearance 0.15))
   (model "../../../../../../Users/pluis/Documents/Magic Briefcase/Documents/KiCad/3d/AB2_TRS_3p5MM_PTH.wrl"
     (at (xyz 0 0 0))
diff --git a/pcb/Lily58-footprint.pretty/jumper_data.kicad_mod b/pcb/Lily58-footprint.pretty/jumper_data.kicad_mod
new file mode 100644
index 0000000..82225c9
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/jumper_data.kicad_mod
@@ -0,0 +1,24 @@
+(module kbd:JPC2 (layer F.Cu) (tedit 5AD20B15)
+  (attr smd)
+  (fp_text reference data (at -0.1 2.3 270) (layer F.SilkS)
+    (effects (font (size 0.8128 0.8128) (thickness 0.1524)))
+  )
+  (fp_text value " " (at 0 1.524) (layer F.SilkS) hide
+    (effects (font (size 0.8128 0.8128) (thickness 0.15)))
+  )
+  (fp_line (start -1.143 0.889) (end -1.143 -0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.143 0.889) (end -1.143 0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.143 -0.889) (end 1.143 0.889) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.143 -0.889) (end 1.143 -0.889) (layer F.SilkS) (width 0.15))
+  (pad "" smd rect (at 0 0 90) (size 0.381 0.381) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.00254))
+  (pad 2 smd rect (at 0.50038 0) (size 0.635 1.143) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.1905))
+  (pad 1 smd rect (at -0.50038 0) (size 0.635 1.143) (layers F.Cu F.Paste F.Mask)
+    (clearance 0.1905))
+  (model smd\resistors\R0603.wrl
+    (offset (xyz 0 0 0.02539999961853028))
+    (scale (xyz 0.5 0.5 0.5))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/pcb/Lily58-footprint.pretty/lily58_logo.kicad_mod b/pcb/Lily58-footprint.pretty/lily58_logo.kicad_mod
new file mode 100644
index 0000000..6f51c4e
--- /dev/null
+++ b/pcb/Lily58-footprint.pretty/lily58_logo.kicad_mod
@@ -0,0 +1,542 @@
+(module lily58_logo (layer F.Cu) (tedit 5B8F6F90)
+  (fp_text reference G*** (at 0 -2) (layer F.SilkS) hide
+    (effects (font (size 1.524 1.524) (thickness 0.3)))
+  )
+  (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide
+    (effects (font (size 1.524 1.524) (thickness 0.3)))
+  )
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+    (xy -3.314069 -1.505048) (xy -3.294481 -1.516969) (xy -3.273494 -1.526321) (xy -3.251388 -1.533038)
+    (xy -3.228446 -1.537053) (xy -3.204947 -1.538299) (xy -3.181174 -1.536711)) (layer F.SilkS) (width 0.01))
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diff --git a/pcb/lib/3PIN.dcm b/pcb/lib/3PIN.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/3PIN.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/3PIN.lib b/pcb/lib/3PIN.lib
new file mode 100644
index 0000000..e933dba
--- /dev/null
+++ b/pcb/lib/3PIN.lib
@@ -0,0 +1,4 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+#End Library
diff --git a/pcb/lib/4pin.dcm b/pcb/lib/4pin.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/4pin.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/4pin.lib b/pcb/lib/4pin.lib
new file mode 100644
index 0000000..ef59cf3
--- /dev/null
+++ b/pcb/lib/4pin.lib
@@ -0,0 +1,21 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# 4PIN
+#
+DEF 4PIN J 0 40 Y Y 1 F N
+F0 "J" 0 300 60 H V C CNN
+F1 "4PIN" 0 -300 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+T 900 -100 0 60 0 0 0 4PIN Normal 1 C C
+P 4 0 0 0 -100 250 50 250 50 -250 -100 -250 N
+X 1 1 250 150 200 L 50 50 1 1 W
+X 2 2 250 50 200 L 50 50 1 1 B
+X 3 3 250 -50 200 L 50 50 1 1 B
+X 4 4 250 -150 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/5pin.lib b/pcb/lib/5pin.lib
index d8460e9..3f01cd0 100644
--- a/pcb/lib/5pin.lib
+++ b/pcb/lib/5pin.lib
@@ -1,6 +1,23 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# 5PIN
+#
+DEF 5PIN J 0 40 Y Y 1 F N
+F0 "J" 0 300 60 H V C CNN
+F1 "5PIN" 0 -300 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+T 900 -100 0 60 0 0 0 5PIN Normal 1 C C
+P 4 0 0 0 -100 250 50 250 50 -250 -100 -250 N
+X 1 1 250 150 200 L 50 50 1 1 W
+X 2 2 250 50 200 L 50 50 1 1 B
+X 3 3 250 -50 200 L 50 50 1 1 B
+X 4 4 250 -150 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # minisplit-cache:5PIN
 #
 DEF minisplit-cache:5PIN J 0 40 Y Y 1 F N
diff --git a/pcb/lib/conn_01x01.dcm b/pcb/lib/conn_01x01.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/conn_01x01.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/conn_01x01.lib b/pcb/lib/conn_01x01.lib
new file mode 100644
index 0000000..662f9e2
--- /dev/null
+++ b/pcb/lib/conn_01x01.lib
@@ -0,0 +1,26 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Conn_01x01
+#
+DEF Conn_01x01 J 0 40 Y N 1 F N
+F0 "J" 0 100 50 H V C CNN
+F1 "Conn_01x01" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_??x*mm*
+ Connector*:*1x??x*mm*
+ Pin?Header?Straight?1X*
+ Pin?Header?Angled?1X*
+ Socket?Strip?Straight?1X*
+ Socket?Strip?Angled?1X*
+$ENDFPLIST
+DRAW
+S -50 5 0 -5 1 1 6 N
+S -50 50 50 -50 1 1 10 f
+X Pin_1 1 -200 0 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/conn_01x04.dcm b/pcb/lib/conn_01x04.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/conn_01x04.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/conn_01x04.lib b/pcb/lib/conn_01x04.lib
new file mode 100644
index 0000000..f1bd0ae
--- /dev/null
+++ b/pcb/lib/conn_01x04.lib
@@ -0,0 +1,30 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# CONN_01X04
+#
+DEF CONN_01X04 P 0 40 Y N 1 F N
+F0 "P" 0 250 50 H V C CNN
+F1 "CONN_01X04" 100 0 50 V V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X04
+ Pin_Header_Angled_1X04
+ Socket_Strip_Straight_1X04
+ Socket_Strip_Angled_1X04
+$ENDFPLIST
+DRAW
+S -50 -145 10 -155 0 1 0 N
+S -50 -45 10 -55 0 1 0 N
+S -50 55 10 45 0 1 0 N
+S -50 155 10 145 0 1 0 N
+S -50 200 50 -200 0 1 0 N
+X P1 1 -200 150 150 R 50 50 1 1 P
+X P2 2 -200 50 150 R 50 50 1 1 P
+X P3 3 -200 -50 150 R 50 50 1 1 P
+X P4 4 -200 -150 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/conn_01x06.dcm b/pcb/lib/conn_01x06.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/conn_01x06.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/conn_01x06.lib b/pcb/lib/conn_01x06.lib
new file mode 100644
index 0000000..c4ee532
--- /dev/null
+++ b/pcb/lib/conn_01x06.lib
@@ -0,0 +1,34 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# CONN_01X06
+#
+DEF CONN_01X06 P 0 40 Y N 1 F N
+F0 "P" 0 350 50 H V C CNN
+F1 "CONN_01X06" 100 0 50 V V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X06
+ Pin_Header_Angled_1X06
+ Socket_Strip_Straight_1X06
+ Socket_Strip_Angled_1X06
+$ENDFPLIST
+DRAW
+S -50 -245 10 -255 0 1 0 N
+S -50 -145 10 -155 0 1 0 N
+S -50 -45 10 -55 0 1 0 N
+S -50 55 10 45 0 1 0 N
+S -50 155 10 145 0 1 0 N
+S -50 255 10 245 0 1 0 N
+S -50 300 50 -300 0 1 0 N
+X P1 1 -200 250 150 R 50 50 1 1 P
+X P2 2 -200 150 150 R 50 50 1 1 P
+X P3 3 -200 50 150 R 50 50 1 1 P
+X P4 4 -200 -50 150 R 50 50 1 1 P
+X P5 5 -200 -150 150 R 50 50 1 1 P
+X P6 6 -200 -250 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/d.lib b/pcb/lib/d.lib
index da8f3f7..a41d908 100644
--- a/pcb/lib/d.lib
+++ b/pcb/lib/d.lib
@@ -1,6 +1,28 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# D
+#
+DEF D D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "D" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ TO-???*
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+P 2 0 1 8 -50 50 -50 -50 N
+P 2 0 1 0 50 0 -50 0 N
+P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
+X K 1 -150 0 100 R 50 50 1 1 P
+X A 2 150 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # Device:D
 #
 DEF Device:D D 0 40 N N 1 F N
diff --git a/pcb/lib/gnd.lib b/pcb/lib/gnd.lib
index f6c1385..04cb845 100644
--- a/pcb/lib/gnd.lib
+++ b/pcb/lib/gnd.lib
@@ -1,6 +1,19 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 1 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 R 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # power:GND
 #
 DEF power:GND #PWR 0 0 Y Y 1 F P
diff --git a/pcb/lib/hole.lib b/pcb/lib/hole.lib
index 0943b20..61ac170 100644
--- a/pcb/lib/hole.lib
+++ b/pcb/lib/hole.lib
@@ -1,6 +1,19 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# HOLE
+#
+DEF HOLE U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "HOLE" 0 -200 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 0 150 60 0 0 0 HOLE Normal 0 C C
+S 150 200 -150 -150 0 1 0 N
+ENDDRAW
+ENDDEF
+#
 # minisplit-cache:HOLE
 #
 DEF minisplit-cache:HOLE U 0 40 Y Y 1 F N
diff --git a/pcb/lib/jumper.dcm b/pcb/lib/jumper.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/jumper.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/jumper.lib b/pcb/lib/jumper.lib
new file mode 100644
index 0000000..44e5164
--- /dev/null
+++ b/pcb/lib/jumper.lib
@@ -0,0 +1,19 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# JP2
+#
+DEF JP2 J 0 40 N N 1 F N
+F0 "J" 100 150 50 H V C CNN
+F1 "JP2" 100 -149 40 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -40 -10 -40 -100 40 -100 40 -10 F
+P 4 0 1 0 -40 10 -40 100 40 100 40 10 F
+X G1 1 0 200 100 D 60 60 1 1 P
+X G2 2 0 -200 100 U 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/jumper_smd.lib b/pcb/lib/jumper_smd.lib
index baeea8b..94debf9 100644
--- a/pcb/lib/jumper_smd.lib
+++ b/pcb/lib/jumper_smd.lib
@@ -1,6 +1,21 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# jumper_smd
+#
+DEF jumper_smd W 0 30 N N 1 F N
+F0 "W" 0 60 50 H V C CNN
+F1 "jumper_smd" 0 -70 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+C -70 0 30 0 1 0 N
+C 70 0 30 0 1 0 N
+X 1 1 -200 0 100 R 50 50 0 1 P
+X 2 2 200 0 100 L 50 50 0 1 P
+ENDDRAW
+ENDDEF
+#
 # minisplit-cache:jumper_smd
 #
 DEF minisplit-cache:jumper_smd W 0 30 N N 1 F N
diff --git a/pcb/lib/led.dcm b/pcb/lib/led.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/led.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/led.lib b/pcb/lib/led.lib
new file mode 100644
index 0000000..114a0dc
--- /dev/null
+++ b/pcb/lib/led.lib
@@ -0,0 +1,32 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# LED
+#
+DEF LED J 0 40 Y N 1 F N
+F0 "J" 0 200 50 H V C CNN
+F1 "LED" 0 -200 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_??x*mm*
+ Connector*:*1x??x*mm*
+ Pin?Header?Straight?1X*
+ Pin?Header?Angled?1X*
+ Socket?Strip?Straight?1X*
+ Socket?Strip?Angled?1X*
+$ENDFPLIST
+DRAW
+S -50 150 50 -150 1 1 10 f
+S 0 -95 50 -105 1 1 6 N
+S 0 5 50 -5 1 1 6 N
+S 0 105 50 95 1 1 6 N
+P 2 1 1 10 -50 -50 50 -50 N
+P 2 1 1 10 -50 50 50 50 N
+X Pin_1 1 200 100 150 L 50 50 1 1 P
+X Pin_2 2 200 0 150 L 50 50 1 1 P
+X Pin_3 3 200 -100 150 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/lily58-cache:mj-4pp-9.dcm b/pcb/lib/lily58-cache:mj-4pp-9.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/lily58-cache:mj-4pp-9.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/lily58-cache:mj-4pp-9.lib b/pcb/lib/lily58-cache:mj-4pp-9.lib
new file mode 100644
index 0000000..b0722c5
--- /dev/null
+++ b/pcb/lib/lily58-cache:mj-4pp-9.lib
@@ -0,0 +1,28 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Lily58-cache:MJ-4PP-9
+#
+DEF Lily58-cache:MJ-4PP-9 J 0 40 Y Y 1 F N
+F0 "J" -350 -300 60 H V C CNN
+F1 "Lily58-cache:MJ-4PP-9" -150 250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 100 -350 -150 0 1 0 N
+S 300 -250 -400 200 0 1 0 N
+P 2 0 1 0 100 0 300 0 N
+P 3 0 1 0 -100 -200 300 -200 300 -200 N
+P 3 0 1 0 0 -100 -50 -50 -100 -100 N
+P 3 0 1 0 0 0 50 50 100 0 N
+P 3 0 1 0 300 150 -300 150 -300 100 N
+P 4 0 1 0 -100 -200 -150 -150 -200 -200 -200 -200 N
+P 4 0 1 0 0 -100 300 -100 300 -100 300 -100 N
+X ~ 1 450 0 150 L 50 50 1 1 P
+X ~ 2 450 -100 150 L 50 50 1 1 P
+X ~ 3 450 -200 150 L 50 50 1 1 P
+X ~ 4 450 150 150 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/lily58-cache:promicro_2.dcm b/pcb/lib/lily58-cache:promicro_2.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/lily58-cache:promicro_2.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/lily58-cache:promicro_2.lib b/pcb/lib/lily58-cache:promicro_2.lib
new file mode 100644
index 0000000..90ae0ba
--- /dev/null
+++ b/pcb/lib/lily58-cache:promicro_2.lib
@@ -0,0 +1,40 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Lily58-cache:ProMicro_2
+#
+DEF Lily58-cache:ProMicro_2 U 0 40 Y Y 1 F N
+F0 "U" 0 700 50 H V C CNN
+F1 "Lily58-cache:ProMicro_2" 0 -700 50 H V C CNN
+F2 "" -50 100 50 H I C CNN
+F3 "" -50 100 50 H I C CNN
+DRAW
+S -450 650 450 -650 0 1 0 N
+X TX(PD3) 1 -650 550 200 R 50 50 1 1 I
+X D7(PE6) 10 -650 -350 200 R 50 50 1 1 I
+X D8(PB4) 11 -650 -450 200 R 50 50 1 1 I
+X D9(PB5) 12 -650 -550 200 R 50 50 1 1 I
+X D10(PB6) 13 650 -550 200 L 50 50 1 1 I
+X D16(PB2) 14 650 -450 200 L 50 50 1 1 I
+X D14(PB3) 15 650 -350 200 L 50 50 1 1 I
+X D15(PB1) 16 650 -250 200 L 50 50 1 1 I
+X A0(PF7) 17 650 -150 200 L 50 50 1 1 I
+X A1(PF6) 18 650 -50 200 L 50 50 1 1 I
+X A2(PF5) 19 650 50 200 L 50 50 1 1 I
+X RX(PD2) 2 -650 450 200 R 50 50 1 1 I
+X A3(PF4) 20 650 150 200 L 50 50 1 1 I
+X VCC 21 650 250 200 L 50 50 1 1 I
+X RST 22 650 350 200 L 50 50 1 1 I
+X GND 23 650 450 200 L 50 50 1 1 I
+X RAW 24 650 550 200 L 50 50 1 1 I
+X GND 3 -650 350 200 R 50 50 1 1 I
+X GND 4 -650 250 200 R 50 50 1 1 I
+X SDA(PD1) 5 -650 150 200 R 50 50 1 1 I
+X SCL(PD0) 6 -650 50 200 R 50 50 1 1 I
+X D4(PD4) 7 -650 -50 200 R 50 50 1 1 I
+X D5(PC6) 8 -650 -150 200 R 50 50 1 1 I
+X D6(PD7) 9 -650 -250 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/mj-4pp-9.dcm b/pcb/lib/mj-4pp-9.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/mj-4pp-9.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/mj-4pp-9.lib b/pcb/lib/mj-4pp-9.lib
new file mode 100644
index 0000000..73283dd
--- /dev/null
+++ b/pcb/lib/mj-4pp-9.lib
@@ -0,0 +1,28 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# MJ-4PP-9
+#
+DEF MJ-4PP-9 J 0 40 Y Y 1 F N
+F0 "J" -350 -300 60 H V C CNN
+F1 "MJ-4PP-9" -150 250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 100 -350 -150 0 1 0 N
+S 300 -250 -400 200 0 1 0 N
+P 2 0 1 0 100 0 300 0 N
+P 3 0 1 0 -100 -200 300 -200 300 -200 N
+P 3 0 1 0 0 -100 -50 -50 -100 -100 N
+P 3 0 1 0 0 0 50 50 100 0 N
+P 3 0 1 0 300 150 -300 150 -300 100 N
+P 4 0 1 0 -100 -200 -150 -150 -200 -200 -200 -200 N
+P 4 0 1 0 0 -100 300 -100 300 -100 300 -100 N
+X ~ A 450 150 150 L 50 50 1 1 P
+X ~ B 450 -200 150 L 50 50 1 1 P
+X ~ C 450 -100 150 L 50 50 1 1 P
+X ~ D 450 0 150 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/oled.dcm b/pcb/lib/oled.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/oled.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/oled.lib b/pcb/lib/oled.lib
new file mode 100644
index 0000000..fac5404
--- /dev/null
+++ b/pcb/lib/oled.lib
@@ -0,0 +1,30 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# OLED
+#
+DEF OLED J 0 40 Y N 1 F N
+F0 "J" 0 250 50 H V C CNN
+F1 "OLED" 100 0 50 V V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X04
+ Pin_Header_Angled_1X04
+ Socket_Strip_Straight_1X04
+ Socket_Strip_Angled_1X04
+$ENDFPLIST
+DRAW
+S -50 -145 10 -155 0 1 0 N
+S -50 -45 10 -55 0 1 0 N
+S -50 55 10 45 0 1 0 N
+S -50 155 10 145 0 1 0 N
+S -50 200 50 -200 0 1 0 N
+X P1 1 -200 150 150 R 50 50 1 1 P
+X P2 2 -200 50 150 R 50 50 1 1 P
+X P3 3 -200 -50 150 R 50 50 1 1 P
+X P4 4 -200 -150 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/promicro.lib b/pcb/lib/promicro.lib
index 4bf5ade..90d20ad 100644
--- a/pcb/lib/promicro.lib
+++ b/pcb/lib/promicro.lib
@@ -1,6 +1,44 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# ProMicro
+#
+DEF ProMicro U 0 40 Y Y 1 F N
+F0 "U" 350 950 60 H V C CNN
+F1 "ProMicro" -200 0 60 V V C CNN
+F2 "" -1200 -200 60 H V C CNN
+F3 "" -1200 -200 60 H V C CNN
+DRAW
+S -250 900 400 -1000 0 1 0 N
+S 400 -800 400 -800 0 1 0 N
+S 400 -800 400 -800 0 1 0 N
+X TX(PD3) 1 600 850 200 L 50 50 1 1 B
+X D7(PE6) 10 600 150 200 L 50 50 1 1 B
+X D8(PB4) 11 600 50 200 L 50 50 1 1 B
+X D9(PB5) 12 600 -50 200 L 50 50 1 1 B
+X D10(PB6) 13 600 -150 200 L 50 50 1 1 B
+X D16(PB2) 14 600 -250 200 L 50 50 1 1 B
+X D14(PB3) 15 600 -350 200 L 50 50 1 1 B
+X D15(PB1) 16 600 -450 200 L 50 50 1 1 B
+X A0(PF7) 17 600 -550 200 L 50 50 1 1 B
+X A1(PF6) 18 600 -650 200 L 50 50 1 1 B
+X A2(PF5) 19 600 -750 200 L 50 50 1 1 B
+X RX(PD2) 2 600 750 200 L 50 50 1 1 B
+X A3(PF4) 20 600 -850 200 L 50 50 1 1 B
+X VCC 21 -50 1100 200 D 50 50 1 1 W
+X RST 22 600 -950 200 L 50 50 1 1 I
+X GND 23 0 -1200 200 U 50 50 1 1 W
+X RAW 24 -150 1100 200 D 50 50 1 1 w
+X GND 3 -200 -1200 200 U 50 50 1 1 W
+X GND 4 -100 -1200 200 U 50 50 1 1 W
+X SDA(PD1) 5 600 650 200 L 50 50 1 1 B
+X SCL(PD0) 6 600 550 200 L 50 50 1 1 B
+X D4(PD4) 7 600 450 200 L 50 50 1 1 B
+X D5(PC6) 8 600 350 200 L 50 50 1 1 B
+X D6(PD7) 9 600 250 200 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # minisplit-cache:ProMicro
 #
 DEF minisplit-cache:ProMicro U 0 40 Y Y 1 F N
diff --git a/pcb/lib/promicro_2.dcm b/pcb/lib/promicro_2.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/promicro_2.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/promicro_2.lib b/pcb/lib/promicro_2.lib
new file mode 100644
index 0000000..e0922dd
--- /dev/null
+++ b/pcb/lib/promicro_2.lib
@@ -0,0 +1,76 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Lily58-cache:ProMicro_2
+#
+DEF Lily58-cache:ProMicro_2 U 0 40 Y Y 1 F N
+F0 "U" 0 700 50 H V C CNN
+F1 "Lily58-cache:ProMicro_2" 0 -700 50 H V C CNN
+F2 "" -50 100 50 H I C CNN
+F3 "" -50 100 50 H I C CNN
+DRAW
+S -450 650 450 -650 0 1 0 N
+X TX(PD3) 1 -650 550 200 R 50 50 1 1 I
+X D7(PE6) 10 -650 -350 200 R 50 50 1 1 I
+X D8(PB4) 11 -650 -450 200 R 50 50 1 1 I
+X D9(PB5) 12 -650 -550 200 R 50 50 1 1 I
+X D10(PB6) 13 650 -550 200 L 50 50 1 1 I
+X D16(PB2) 14 650 -450 200 L 50 50 1 1 I
+X D14(PB3) 15 650 -350 200 L 50 50 1 1 I
+X D15(PB1) 16 650 -250 200 L 50 50 1 1 I
+X A0(PF7) 17 650 -150 200 L 50 50 1 1 I
+X A1(PF6) 18 650 -50 200 L 50 50 1 1 I
+X A2(PF5) 19 650 50 200 L 50 50 1 1 I
+X RX(PD2) 2 -650 450 200 R 50 50 1 1 I
+X A3(PF4) 20 650 150 200 L 50 50 1 1 I
+X VCC 21 650 250 200 L 50 50 1 1 I
+X RST 22 650 350 200 L 50 50 1 1 I
+X GND 23 650 450 200 L 50 50 1 1 I
+X RAW 24 650 550 200 L 50 50 1 1 I
+X GND 3 -650 350 200 R 50 50 1 1 I
+X GND 4 -650 250 200 R 50 50 1 1 I
+X SDA(PD1) 5 -650 150 200 R 50 50 1 1 I
+X SCL(PD0) 6 -650 50 200 R 50 50 1 1 I
+X D4(PD4) 7 -650 -50 200 R 50 50 1 1 I
+X D5(PC6) 8 -650 -150 200 R 50 50 1 1 I
+X D6(PD7) 9 -650 -250 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# ProMicro_2
+#
+DEF ProMicro_2 U 0 40 Y Y 1 F N
+F0 "U" 0 700 50 H V C CNN
+F1 "ProMicro_2" 0 -700 50 H V C CNN
+F2 "" -50 100 50 H I C CNN
+F3 "" -50 100 50 H I C CNN
+DRAW
+S -450 650 450 -650 0 1 0 N
+X TX(PD3) 1 -650 550 200 R 50 50 1 1 I
+X D7(PE6) 10 -650 -350 200 R 50 50 1 1 I
+X D8(PB4) 11 -650 -450 200 R 50 50 1 1 I
+X D9(PB5) 12 -650 -550 200 R 50 50 1 1 I
+X D10(PB6) 13 650 -550 200 L 50 50 1 1 I
+X D16(PB2) 14 650 -450 200 L 50 50 1 1 I
+X D14(PB3) 15 650 -350 200 L 50 50 1 1 I
+X D15(PB1) 16 650 -250 200 L 50 50 1 1 I
+X A0(PF7) 17 650 -150 200 L 50 50 1 1 I
+X A1(PF6) 18 650 -50 200 L 50 50 1 1 I
+X A2(PF5) 19 650 50 200 L 50 50 1 1 I
+X RX(PD2) 2 -650 450 200 R 50 50 1 1 I
+X A3(PF4) 20 650 150 200 L 50 50 1 1 I
+X RST 21 650 350 200 L 50 50 1 1 I
+X VCC 21 650 250 200 L 50 50 1 1 I
+X GND 23 650 450 200 L 50 50 1 1 I
+X RAW 24 650 550 200 L 50 50 1 1 I
+X GND 3 -650 350 200 R 50 50 1 1 I
+X GND 4 -650 250 200 R 50 50 1 1 I
+X SDA(PD1) 5 -650 150 200 R 50 50 1 1 I
+X SCL(PD0) 6 -650 50 200 R 50 50 1 1 I
+X D4(PD4) 7 -650 -50 200 R 50 50 1 1 I
+X D5(PC6) 8 -650 -150 200 R 50 50 1 1 I
+X D6(PD7) 9 -650 -250 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/pwr_flag.lib b/pcb/lib/pwr_flag.lib
index 3cfcdac..48bf189 100644
--- a/pcb/lib/pwr_flag.lib
+++ b/pcb/lib/pwr_flag.lib
@@ -1,6 +1,19 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# PWR_FLAG
+#
+DEF PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 0 50 H I C CNN
+F1 "PWR_FLAG" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
+X pwr 1 0 0 0 U 50 50 0 0 w
+ENDDRAW
+ENDDEF
+#
 # power:PWR_FLAG
 #
 DEF power:PWR_FLAG #FLG 0 0 N N 1 F P
diff --git a/pcb/lib/r.lib b/pcb/lib/r.lib
index 3962f48..9e3e484 100644
--- a/pcb/lib/r.lib
+++ b/pcb/lib/r.lib
@@ -18,4 +18,21 @@ X ~ 2 0 -150 50 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 0 0 50 V V C CNN
+F1 "R" -100 0 50 V V C CNN
+F2 "" -70 0 50 V I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+$ENDFPLIST
+DRAW
+S -40 -100 40 100 0 1 10 N
+X ~ 1 0 150 50 D 50 50 1 1 P
+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 #End Library
diff --git a/pcb/lib/sw_rst.dcm b/pcb/lib/sw_rst.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/pcb/lib/sw_rst.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/pcb/lib/sw_rst.lib b/pcb/lib/sw_rst.lib
new file mode 100644
index 0000000..48bc0fa
--- /dev/null
+++ b/pcb/lib/sw_rst.lib
@@ -0,0 +1,34 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Lily58-cache:SW_RST
+#
+DEF Lily58-cache:SW_RST RSW 0 40 N N 1 F N
+F0 "RSW" 100 100 40 H V C CNN
+F1 "Lily58-cache:SW_RST" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -100 50 100 50 N
+P 2 0 1 0 0 100 0 50 N
+X 1 1 -150 0 100 R 50 50 0 1 P I
+X 2 2 150 0 100 L 50 50 0 1 P I
+ENDDRAW
+ENDDEF
+#
+# SW_RST
+#
+DEF SW_RST RSW 0 40 N N 1 F N
+F0 "RSW" 100 100 40 H V C CNN
+F1 "SW_RST" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -100 50 100 50 N
+P 2 0 1 0 0 100 0 50 N
+X 1 1 -150 0 100 R 50 50 0 1 P I
+X 2 2 150 0 100 L 50 50 0 1 P I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/pcb/lib/vcc.lib b/pcb/lib/vcc.lib
index c1ef9b3..d4138d2 100644
--- a/pcb/lib/vcc.lib
+++ b/pcb/lib/vcc.lib
@@ -1,6 +1,20 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# VCC
+#
+DEF VCC #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "VCC" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VCC 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # power:VCC
 #
 DEF power:VCC #PWR 0 0 Y Y 1 F P